CPU Physical Design Integration
Austin · Santa Clara · Bangalore · $140K–250K · Full-time
Posted 18 Sep 2026
Nuvacore is building ground-up high performance, low-power CPU for next-generation compute workloads. As a member of our CPU physical design integration team, you'll drive end-to-end integration, physical verification, and final tapeout signoff checks.
THE ROLE
As a CPU Physical Design (PD) Engineer for Integration you will participate in the following :
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Lead and/or participate in overall floorplan development and drive area optimization
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Own and develop the end-to-end Physical Design Integration methodology and execution.
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Drive and participate in efforts for Physical Verification (PV), PERC, and ESD signoff
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Own bump and RDL design in close collaboration with the internal packaging team.
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Own the complete analog interfaces, and custom signal construction and implementation.
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Interface directly with foundry and technology teams as required.
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Partner with the internal CAD team to develop and maintain the Tools Flow and Methodology (TFM) across all relevant design domains.
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Collaborate with CPU and subsystem unit owners, custom circuit designers, CAD engineers, and RTL teams as essential.
MINIMUM QUALIFICATIONS
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Hold a BS or MS degree with 12+ years of experience (for Lead roles) or 5+ years of experience (for Individual Contributor roles) in CPU physical design integration
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Experience in multiple Tapeouts of SoCs in the latest technology nodes relevant for CPUs.
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Deep expertise in Physical Verification, PERC, ESD, Bump & RDL.
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Expertise in CPU blocks lego planning based on technology rules.
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Experience in Physical design integration methodologies and Signoff process.
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Proficiency with Siemens, or Synopsys or Cadence EDA tools for Physical Design.
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Comprehensive understanding of end-to-end physical design implementation and design closure across all signoff domains.
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Strong communication skills with the ability to build processes and infrastructure from ground up
REQUIREMENTS — PREFERRED
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Experience with PNR (Place and Route) & owning blocks.
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Proficiency in scripting languages including Python, Perl, and/or TCL for design automation and flow development.
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